1. Field of the Invention
The present invention generally relates to semiconductor memories and, more particularly, to the process of forming a high yield and reliable storage node when a low pressure chemical vapor deposited (LPCVD) silicon oxynitride dielectric film is used as a storage capacitor.
2. Description of the Prior Art
Thin film insulators are key materials in semiconductor integrated circuits, particularly in regard to their application as storage node dielectrics for the storage capacitor of the so-called "one device" dynamic random access memory (DRAM) cell. Typically, a thin film dielectric is thermally grown or deposited on a silicon wafer, and then a metal or polysilicon electrode is deposited on top of the thin film to form the charge plate of the capacitor.
Until recently, silicon dioxide (SiO.sub.2) films have been the most widely used dielectric films due to the stable SiO.sub.2 /Si interface and the good insulating properties of SiO.sub.2 films. However, the dielectric constant of SiO.sub.2 is only 3.9. In present day dynamic random access memory cells wherein the thicknesses of the dielectric film are in the 10-15 nanometer (nm) range, a high yield and reliable SiO.sub.2 film is difficult to grow. Moreover, the defect density of thin SiO.sub.2 films within this thickness range also requires very tight control over a host of sensitive process conditions. More recently, silicon nitride (Si.sub.3 N.sub.4) films have been utilized as storage node dielectrics. Si.sub.3 N.sub.4 has a dielectric constant of 7, which is significantly higher than SiO.sub.2. As such, a thicker layer may be used to improve yield and to reduce process sensitivity. Unfortunately the d.c. leakage of Si.sub.3 N.sub.4 is much higher than that of SiO.sub.2. Moreover, Si.sub.3 N.sub.4 films may produce film stresses of sufficient magnitude to generate crystal lattice dislocations in the underlaying silicon substrate.
Zimmer in U.S. Pat. No. 4,140,548 discloses a method of making a metal oxide semiconductor (MOS) which utilizes a two layer oxide. One of the layers is thermal SiO.sub.2 and the other layer is deposited SiO.sub.2. The very thin layer of thermal SiO.sub.2 is formed by heating a silicon wafer in dry O.sub.2 at 950.degree. C.
Barile et al in U.S. Pat. No. 3,793,090 disclose an example of a composite of silicon dioxide-silicon nitride film used as the gate dielectric of a field effect transistor (FET). The composite film is annealed in dry oxygen at a temperature of 1050.degree. C. In the Barile et al process a thin layer of silicon oxynitride forms on top of the nitride layer should the O.sub.2 anneal be carried out prior to depositing the gate electrode.
U.S. Pat. No. 4,543,707 to Ito et al shows plasma chemical vapor deposited silicon oxynitride used as an electrode dielectric. Ito et al disclose that silicon oxynitride acts as a strong barrier against contaminants such as water, alkali ions, and other impurities. Ito et al also state that because of the high dielectric constant of silicon oxynitride, a high field threshold voltage can be obtained. The patent is generally related to stacking silicon oxynitride layers of different compositions on top of one another by varying the N/O ratio. The stacked silicon oxynitride layers tend to etch at different rates.
U.S. Pat. No. 3,886,000 by Bratter et al discloses a semiconductor device in which silicon oxynitride is deposited by the reaction of carbon dioxide, ammonia, and silane. In this patent the silicon oxynitride is thermally oxidized to SiO.sub.2.
Many patents have been issued relating to annealing processes that overcome various difficulties encountered in processing semiconductor films. An "anneal" is a heating process which drives out impurities from an exposed film, introduces elements that are present in the anneal ambient into the film, and densifies the film. U.S. Pat. No. 4,001,049 to Baglin et al discloses a particular ion radiation treatment of amorphous SiO.sub.2 film with a subsequent annealing procedure which improves the dielectric breakdown property of the film. The temperature range for annealing is from 200.degree. C. to 800.degree. C. U.S. Pat. No. 4,364,779 to Kamgar et al discloses a double annealing step for radiation hardening. U.S. Pat. No. 4,397,695 to Arit et al discloses a method for stabilizing the current gain of NPN-Silicon transistors which includes two separate annealing processes at different temperatures. U.S. Pat. No. 4,329,773 to Geipel, Jr. et al discloses a process in which a wet oxygen (steam) anneal is carried out on a substrate having implanted arsenic ions. Little or no alteration of the arsenic (As.sup.+) concentration profile occurs when the anneal is carried out between the temperatures of 850.degree. C. and 1000.degree. C. Burkhardt et al in IBM Technical Disclosure Bulletin, Vol. 18, No. 3, August 1975, page 753, disclose a post oxidation anneal procedure using a radio frequency (RF) heated susceptor which reduces mobile ion charge levels. Gardner in IBM Technical Disclosure Bulletin, Vol. 17, No. 1, June 1974, page 117, discloses a field-effect transistor gate annealing to reduce fixed charges in an SiO.sub.2 layer.
P. H. Pan, J. Abernathy, and C. Schaeffer showed in an article appearing in The Journal of Electronic Materials, Vol. 14, No. 5, Sept. 1985, pages 617 to 632, that silicon oxynitride films deposited by LPCVD techniques are dominated by a mixed matrix of silicon, nitrogen, and oxygen, which may be expressed as (Si.sub.x --O.sub.y --N.sub.z). The silicon oxynitride films were deposited in a hot wall LPCVD reactor at 800.degree. C. The reactant gases were (SiH.sub.2 Cl.sub.2), ammonia (NH.sub.3), and nitrous oxide (N.sub.2 O). The total deposition pressure was 0.3 Torr. Samples with refractive indices (n) ranging from 1.65 to 1.85 were obtained by varying the N.sub.2 O/(N.sub.2 O+NH.sub.3) gas ratio from 0.1 to 0.5. The film composition and structure of the LPCVD silicon oxynitride film was analyzed using Auger electron spectroscopy (AES), X-ray photoelectron spectroscopy (XPS), and infrared techniques. Thermal SiO.sub.2 and LPCVD Si.sub.3 N.sub.4 films were used as a standard to determine the concentration of O, N, and Si. The Auger depth profile results indicated good compositional uniformity as a function of depth. The XPS peak for silicon oxynitride (103.1 eV) was between the peaks for SiO.sub.2 (104 eV) and Si.sub.3 N.sub.4 (102.7 eV). Fourier transform infrared (FTIR) spectra indicated a broad Si--O--N stretching bond between 1080 cm.sup.-1 and 840 cm.sup.-1. High frequency (1 MHz) and quasi-static capacitor-voltage (C-V) measurements were used to determine the flatband voltage and surface state density. The breakdown voltage was defined as the voltage across an insulator when a current level of 10 microampere is conducted through the film. It was found that the average breakdown strength (i.e., the breakdown voltage divided by the film thickness) of the film as deposited (i.e., prior to any further processing such as implantation) was greater than 12 MV/cm and the deviation was less than 2 MV/cm. The conduction of these films before and after annealing (900.degree. C. in N.sub.2 or O.sub.2) was also discussed. The anneal cycle was found to reduce the positive charge and leakage currents in the oxynitride film.
In general, there is no teaching in the prior art of an anneal process that would materially improve the breakdown voltage of silicon oxynitride films after they have been processed for application as a storage node dielectric.